? semiconductor components industries, llc, 2001 december, 2001 rev. 5 1 publication order number: mc74vhc244/d mc74vhc244 octal bus buffer the mc74vhc244 is an advanced high speed cmos octal bus buffer fabricated with silicon gate cmos technology. the mc74vhc244 is a noninverting 3state buffer, and has two activelow output enables. this device is designed to be used with 3state memory address drivers, etc. the internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. the inputs tolerate voltages up to 7 v, allowing the interface of 5 v systems to 3 v systems. ? high speed: t pd = 3.9 ns (typ) at v cc = 5 v ? low power dissipation: i cc = 4 m a (max) at t a = 25 c ? high noise immunity: v nih = v nil = 28% v cc ? power down protection provided on inputs ? balanced propagation delays ? designed for 2 v to 5.5 v operating range ? low noise: v olp = 0.9 v (max) ? pin and function compatible with other standard logic families ? latchup performance exceeds 300 ma ? esd performance: hbm > 2000 v; machine model > 200 v ? chip complexity: 136 fets this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open. data inputs a1 a2 a3 a4 b1 b2 b3 b4 17 15 13 11 8 6 4 218 16 14 12 9 7 5 3 yb4 yb3 yb2 yb1 ya4 ya3 ya2 ya1 noninverting outputs output enables oea oeb 1 19 figure 1. logic diagram http://onsemi.com dw suffix 20lead soic wide package case 751d dt suffix 20lead tssop package case 948e m suffix 20lead soic eiaj package case 967 a3 a2 yb4 a1 oea gnd yb1 a4 yb2 yb3 5 4 3 2 1 10 9 8 7 6 14 15 16 17 18 19 20 11 12 13 ya2 b4 ya1 oeb v cc b1 ya4 b2 ya3 b3 pin assignment a = assembly location wl, l = wafer lot yy, y = year ww, w = work week vhc244 awlyyww vhc 244 alyw 74vhc244 awlyww device marking 1 20 see detailed ordering and shipping information in the ordering information table on page 3 of this data sheet. ordering information 1 20 1 20
mc74vhc244 http://onsemi.com 2 maximum ratings (note 1) symbol parameter value unit v cc positive dc supply voltage 0.5 to +7.0 v v in digital input voltage 0.5 to +7.0 v v out dc output voltage 0.5 to v cc +0.5 v i ik input diode current 20 ma i ok output diode current 20 ma i out dc output current, per pin 25 ma i cc dc supply current, v cc and gnd pins 75 ma p d power dissipation in still air soic package tssop 500 450 mw t stg storage temperature range 65 to +150 c v esd esd withstand voltage human body model (note 2) machine model (note 3) charged device model (note 4) >2000 >200 >2000 v i latchup latchup performance above v cc and below gnd at 125 c (note 5) 300 ma ja thermal resistance, junction to ambient soic package tssop 96 128 c/w 1. maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to th e recommended operating conditions. 2. tested to eia/jesd22a114a 3. tested to eia/jesd22a115a 4. tested to jesd22c101a 5. tested to eia/jesd78 recommended operating conditions symbol characteristics min max unit v cc dc supply voltage 2.0 5.5 v v in dc input voltage 0 5.5 v v out dc output voltage 0 v cc v t a operating temperature range, all package types 55 125 c t r , t f input rise or fall time v cc = 3.3 v + 0.3 v v cc = 5.0 v + 0.5 v 0 100 20 ns/v device junction temperature versus time to 0.1% bond failures junction temperature c time, hours time, years 80 1,032,200 117.8 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 1 1 10 100 1000 time, years normalized failure rate t j = 80 c t j = 90 c t j = 100 c t j = 110 c t j = 130 c t j = 120 c failure rate of plastic = ceramic until intermetallics occur figure 2. failure rate vs. time junction temperature
mc74vhc244 http://onsemi.com 3 dc characteristics (voltages referenced to gnd) v cc t a = 25 c t a 85 c 55 c t a 125 c symbol parameter condition (v) min typ max min max min max unit v ih minimum highlevel input voltage 2.0 3.0 to 5.5 1.5 v ccx 0.7 1.5 v ccx 0.7 1.5 v ccx 0.7 1.5 v ccx 0.7 v v il maximum lowlevel input voltage 2.0 3.0 to 5.5 0.5 v ccx 0.3 0.5 v ccx 0.3 0.5 v ccx 0.3 v v oh maximum highlevel output voltage v in = v ih or v il i oh = 50 m a 2.0 3.0 4.5 1.9 2.9 4.4 2.0 3.0 4.5 1.9 2.9 4.4 1.9 2.9 4.4 v v in = v ih or v il i oh = 4 ma i oh = 8 ma 3.0 4.5 2.58 3.94 2.48 3.8 2.34 3.66 v ol maximum lowlevel output voltage v in = v ih or v il i ol = 50 m a 2.0 3.0 4.5 0.0 0.0 0.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 v v in = v ih or v il i oh = 4 ma i oh = 8 ma 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 i in input leakage current v in = 5.5 v or gnd 0 to 5.5 0.1 1.0 1.0 m a i oz maximum 3state leakage current v in = v ih or v il v out = v cc or gnd 5.5 0.25 2.5 2.5 m a i cc maximum quiescent supply current (per package) v in = v cc or gnd 5.5 4.0 40.0 40.0 m a ordering information device package shipping mc74vhc244dw soic wide 38 units/rail mc74vhc244dwr2 soic wide 1000/tape & reel mc74vhc244dt tssop 75 units/rail mc74vhc244dtr2 tssop 2500/tape & reel mc74vhc244m soic eiaj 1600 units/box mc74vhc244mel soic eiaj 2000/tape & reel function table inputs outputs oea , oeb a, b ya, yb l l l l h h h x z
mc74vhc244 http://onsemi.com 4 ????????????????????????????????? ????????????????????????????????? ac electrical characteristics (input t r = t f = 3.0 ns) ???? ? ?? ? ???? ??????? ? ????? ? ??????? ????????? ? ??????? ? ????????? ??????? ? ????? ? ??????? t a = 25 c ????? ? ??? ? ????? t a 85 c ????? ? ??? ? ????? 55 c t a 125 c ?? ?? ?? ???? ???? symbol ??????? ??????? parameter ????????? ????????? test conditions ??? ??? min ??? ??? typ ??? ??? max ??? ??? min ??? ??? max ??? ??? min ??? ??? max ?? ?? unit ???? ???? t plh , t phl ??????? ??????? maximum propagation delay, a to ya or btoyb ????????? ????????? v cc = 3.3 0.3v c l = 15pf c l = 50pf ??? ??? ??? ??? 5.8 8.3 ??? ??? 8.4 11.9 ??? ??? 1.0 1.0 ??? ??? 10.0 13.5 ??? ??? 1.0 1.0 ??? ??? 11.0 14.5 ?? ?? ns ???? ? ?? ? ???? ??????? ? ????? ? ??????? b to yb ????????? ? ??????? ? ????????? v cc = 5.0 0.5v c l = 15pf c l = 50pf ??? ? ? ? ??? ??? ? ? ? ??? 3.9 5.4 ??? ? ? ? ??? 5.5 7.5 ??? ? ? ? ??? 1.0 1.0 ??? ? ? ? ??? 6.5 8.5 ??? ? ? ? ??? 1.0 1.0 ??? ? ? ? ??? 7.5 9.5 ?? ?? ?? ???? ? ?? ? ???? t pzl , t pzh ??????? ? ????? ? ??????? output enable time oea to ya or oeb to yb ????????? ? ??????? ? ????????? v cc = 3.3 0.3v c l = 15pf r l = 1k w c l = 50pf ??? ? ? ? ??? ??? ? ? ? ??? 6.6 9.1 ??? ? ? ? ??? 10.6 14.1 ??? ? ? ? ??? 1.0 1.0 ??? ? ? ? ??? 12.5 16.0 ??? ? ? ? ??? 1.0 1.0 ??? ? ? ? ??? 13.5 17.0 ?? ?? ?? ns ???? ???? ??????? ??????? oeb to yb ????????? ????????? v cc = 5.0 0.5v c l = 15pf r l = 1k w c l = 50pf ??? ??? ??? ??? 4.7 6.2 ??? ??? 7.3 9.3 ??? ??? 1.0 1.0 ??? ??? 8.5 10.5 ??? ??? 1.0 1.0 ??? ??? 9.5 11.5 ?? ?? ???? ? ?? ? ???? t plz , t phz ??????? ? ????? ? ??????? output disable time oea to ya or oeb to yb ????????? ? ??????? ? ????????? v cc = 3.3 0.3v c l = 50pf r l = 1k w ??? ? ? ? ??? ??? ? ? ? ??? 10.3 ??? ? ? ? ??? 14.0 ??? ? ? ? ??? 1.0 ??? ? ? ? ??? 16.0 ??? ? ? ? ??? 1.0 ??? ? ? ? ??? 17.0 ?? ?? ?? ns ???? ? ?? ? ???? ??????? ? ????? ? ??????? oeb to yb ????????? ? ??????? ? ????????? v cc = 5.0 0.5v c l = 50pf r l = 1k w ??? ? ? ? ??? ??? ? ? ? ??? 6.7 ??? ? ? ? ??? 9.2 ??? ? ? ? ??? 1.0 ??? ? ? ? ??? 10.5 ??? ? ? ? ??? 1.0 ??? ? ? ? ??? 11.5 ?? ?? ?? ???? ???? t oslh , t oshl ??????? ??????? output to output skew ????????? ????????? v cc = 3.3 0.3v c l = 50pf (note 6) ??? ??? ??? ??? ??? ??? 1.5 ??? ??? ??? ??? 1.5 ??? ??? ??? ??? 1.5 ?? ?? ns ???? ? ?? ? ???? ??????? ? ????? ? ??????? ????????? ? ??????? ? ????????? v cc = 5.0 0.5v c l = 50pf (note 6) ??? ? ? ? ??? ??? ? ? ? ??? ??? ? ? ? ??? 1.0 ??? ? ? ? ??? ??? ? ? ? ??? 1.0 ??? ? ? ? ??? ??? ? ? ? ??? 1.5 ?? ?? ?? ???? ? ?? ? ???? c in ??????? ? ????? ? ??????? maximum input capacitance ????????? ? ??????? ? ????????? ??? ? ? ? ??? ??? ? ? ? ??? 4 ??? ? ? ? ??? 10 ??? ? ? ? ??? ??? ? ? ? ??? 10 ??? ? ? ? ??? ??? ? ? ? ??? 10 ?? ?? ?? pf ???? ? ?? ? ? ?? ? ???? c out ??????? ? ????? ? ? ????? ? ??????? maximum threestate output capacitance (output in high impedance state) ????????? ? ??????? ? ? ??????? ? ????????? ??? ? ? ? ? ? ? ??? ??? ? ? ? ? ? ? ??? 6 ??? ? ? ? ? ? ? ??? ??? ? ? ? ? ? ? ??? ??? ? ? ? ? ? ? ??? ??? ? ? ? ? ? ? ??? ??? ? ? ? ? ? ? ??? ?? ?? ?? ?? pf typical @ 25 c, v cc = 5.0v c pd power dissipation capacitance (note 7) 19 pf 6. parameter guaranteed by design. t oslh = |t plhm t plhn |, t oshl = |t phlm t phln |. 7. c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption with out load. average operating current can be obtained by the equation: i cc(opr ) = c pd v cc f in + i cc /8 (per bit). c pd is used to determine the noload dynamic power consumption; p d = c pd v cc 2 f in + i cc v cc . noise characteristics (input t r = t f = 3.0 ns, c l = 50pf, v cc = 5.0 v) t a = 25 c symbol parameter typ max unit v olp quiet output maximum dynamic v ol 0.6 0.9 v v olv quiet output minimum dynamic v ol 0.6 0.9 v v ihd minimum high level dynamic input voltage 3.5 v v ild maximum low level dynamic input voltage 1.5 v
mc74vhc244 http://onsemi.com 5 figure 3. figure 4. v cc gnd a or b ya or yb 50% 50% v cc t plh t phl oea or oeb ya or yb ya or yb 50% 50% v cc 50% v cc t pzl t plz t pzh t phz v cc gnd high impedance v ol +0.3v v oh -0.3v high impedance *includes all probe and jig capacitance c l * test point device under test output figure 5. test circuit *includes all probe and jig capacitance c l * test point device under test output figure 6. test circuit connect to v cc when testing t plz and t pzl . connect to gnd when testing t phz and t pzh . 1 k w test circuits switching waveforms figure 7. input equivalent circuit input
mc74vhc244 http://onsemi.com 6 outline dimensions case 751d05 issue f dw suffix 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition. soic case 948e02 issue a tssop dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. 110 11 20 pin 1 ident a b t 0.100 (0.004) c d g h section nn k k1 jj1 n n m f w seating plane v u s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 --- --- s u 0.15 (0.006) t dt suffix
mc74vhc244 http://onsemi.com 7 outline dimensions case 96701 issue o m suffix dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 12.35 12.80 0.486 0.504 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.81 --- 0.032 a 1 h e q 1 l e 10 0 10 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). h e a 1 l e q 1 c a z d e 20 110 11 b m 0.13 (0.005) e 0.10 (0.004) view p detail p m l a b c d e e l m z soic eiaj
mc74vhc244 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74vhc244/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
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